Computer ScienceExam code: 0984

Computer Architecture

Hardware

Almost every general-purpose computer in use today is built around the , proposed by mathematician John von Neumann in the 1940s. Two design ideas define it:

  1. Stored-program concept. Both data and instructions are held together in the same memory. The CPU does not need separate memories for code and data.
  2. Sequential fetch-decode-execute. The CPU runs one instruction at a time, fetching each from memory in order.

The four building blocks of a Von Neumann CPU:

  • The Arithmetic Logic Unit ()
  • The (CU)
  • A set of
  • A set of buses connecting everything
A block diagram of the Von Neumann architecture. Three boxes across the top: the CPU (labelled ALU, registers and controls), the memory, and input and output. Below them run three horizontal buses stacked vertically: the data bus, the address bus and the control bus. Vertical arrows connect each top box down to the buses, with the data-bus arrows bidirectional
Source: Von Neumann by Save My Exams

Common exam question

Naming a CPU component from its description

Question: State the name of a CPU component from a one-line description of its job, or circle the components built into the CPU (1 mark each).

Asked in 3 of the 17 papers, one mark per name, acronym accepted. Signals that manage the fetch-decode-execute cycle come from the control unit (CU); the arithmetic and logical operations are done by the arithmetic logic unit (ALU); the number of cycles performed each second is set by the clock. Circling the components built into the CPU means the accumulator, the control unit and the program counter, not the graphics card, hard disk drive, motherboard, RAM or ROM.

In the table version each correct name is a mark: signals managing the flow of data mean the control unit, the address of the data about to be fetched is held in the MAR, and an instruction being decoded sits in the CIR.

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