Hardware · 4 question types
Past paper frequency (2018 to 2024)
This topic accounts for approximately 7% of your exam marks.
The fetch-decode-execute cycle and von Neumann architecture are tested almost every year.
A register is a tiny, extremely fast storage location built directly into the CPU. Each register holds a small amount of data needed during one step of the fetch-decode-execute cycle.
Registers are much faster than RAM but only hold a handful of bytes. Each register has a specific job. The five you must know for IGCSE:
| Name | Acronym | Purpose |
|---|---|---|
| Program Counter | PC | Holds the memory address of the next instruction to be fetched. Increments by 1 each time an instruction is fetched, so the CPU naturally walks through the program in order |
| Memory Address Register | MAR | Holds the memory address that the CPU is about to read from or write to. The CPU puts the MAR's contents onto the address bus |
| Memory Data Register | MDR | Holds the data or instruction that has just been read from (or is about to be written to) the address in the MAR. The MDR is the staging area for the data bus |
| Current Instruction Register | CIR | Holds the instruction currently being decoded or executed. The CPU copies the instruction from the MDR into the CIR so the rest of the CPU can act on it |
| Accumulator | ACC | Holds the result of the most recent ALU operation (or an operand being fed to the ALU). Almost every arithmetic result ends up in the ACC |
A useful one-line answer template for register questions:
"The [register] stores [what value]. The CPU then uses it to [purpose during the cycle]."
For example: "The MAR holds the memory address of the next instruction, which is sent to memory along the address bus so the instruction can be fetched."