Logic Gates and Circuits
Boolean Logic · 5 question types
Exam Frequency Analysis
Past paper frequency (2018 to 2024)
This topic accounts for approximately 9% of your exam marks.
Truth tables and Boolean expressions from circuit diagrams appear in every paper. 4 to 6 marks.
For longer questions the examiner gives the circuit and asks for the truth table for every input combination. The cleanest method is to add one column per gate in the order the signals flow, then fill in the table row by row.
Method. (1) Write down every input combination (2ⁿ rows). (2) Add an intermediate column for each internal gate, named after the gate (
X,YorGate 1,Gate 2). (3) Fill in each intermediate column by applying the gate's rule to its input columns, row by row. (4) The final-output columnQis built from whatever feeds the last gate, using its rule.
Completing the truth table for a multi-gate circuit
A logic circuit has three inputs A, B and C. It is described by the expression Q = (A AND B) OR (NOT C). An AND gate combines A and B; a NOT gate inverts C; then an OR gate combines those two results to give the final output Q. Complete the full truth table.
Solution:
Add one intermediate column per gate — label them A AND B and NOT C — then derive Q row by row.
| A | B | C | A AND B | NOT C | Q |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 |
| 0 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 1 | 1 | 0 | 1 |
- A AND B is 1 only in the final two rows where both A and B are 1.
- NOT C is 1 whenever C is 0 (rows 1, 3, 5, 7), and 0 whenever C is 1.
- Q is 1 whenever at least one of those two intermediate values is 1; it is 0 only in rows 2, 4 and 6, where both intermediates are 0.